Pico Hits 100 Mbit Ethernet With Pure Software Magic

Steve Markgraf turned a Raspberry Pi Pico into a functional 100 Mbit Ethernet transmitter. He wrote a library called Pico-100BASE-TX that drives two GPIO pins to produce MLT-3 encoded signals at 125 million symbols per second. The RP2350 microcontroller handles everything through its programmable I/O blocks and DMA channels. No external PHY chip sits on the board. This setup delivers around 11 megabytes per second of real data, enough for streaming audio or sensor readings.

The code builds on earlier efforts. A 2022 project managed 10 Mbit Ethernet with Manchester encoding on the same hardware. Markgraf scaled that up by adding 4B5B coding and an 11-bit scrambler. Lookup tables for these steps fit into 10 kilobytes of RAM. The PIO state machines run independently, so the main CPU stays free for other tasks.

One research team built environmental sensors that report temperature, humidity, and CO2 levels over this software Ethernet. Each node costs eight dollars total, down from twenty-five when using a separate PHY chip. The devices plug into standard network switches and send UDP packets reliably to a central server. Battery life improves because the microcontroller draws less power than a full PHY in transmit mode.

Audio engineers use the same approach for data acquisition. Markgraf demonstrated streaming 75 kHz samples in real time. The throughput supports oscilloscope-grade instruments built around the Pico, replacing equipment that costs hundreds of dollars with a five-dollar board.

The implementation sends data but never receives. Detecting incoming MLT-3 levels demands precise analog comparators and clock recovery that the Pico lacks. Bidirectional communication stays impossible without extra parts. Power over Ethernet also fails because the board connects GPIO directly to cable wires, skipping isolation transformers.

Network switches see these devices as unusual endpoints. They transmit packets but ignore ARP requests or DHCP offers. Administrators configure static IP addresses and separate return paths, often over Wi-Fi or cellular links. Cable length stays short in noisy settings; electrical interference disrupts timing more than with dedicated chips.

Researchers in the 1970s described how functions move from CPU to dedicated cards and back again as technology advances. Early minicomputers handled networking in software. The 1980s brought Ethernet controller chips. Gigabit speeds demanded ASICs. Now programmable I/O brings part of that logic inside the microcontroller die.

The RP2350 fits twelve PIO state machines and 520 kilobytes of SRAM. Clock speeds reach 150 MHz. These specs let developers recreate peripheral behavior that once required separate silicon. Future chiplets may embed shrunk Pico cores into accelerator cards, closing another loop in the cycle.

Organizations that log events without risk of remote control adopt transmit-only links. No receive path means attackers cannot send commands. The Pico pushes encrypted packets to a collector that never responds. Firmware signing on the RP2350 prevents unauthorized code changes.

Isolation still matters. Direct GPIO connections violate safety standards for enterprise networks. External magnetics and filters add a few components but keep costs low compared to full PHY modules. Certification labs test emissions and immunity before deployment.

Experts expect gigabit transmission in five to seven years. Microcontroller clocks keep rising, and PIO blocks grow more capable. Full-duplex gigabit remains out of reach without analog front-ends. Reception algorithms may use machine learning to recover clocks from noisy signals, but hardware limits persist.

Open-source contributors work on receive code for other platforms. Shared libraries could run on STM32 or ESP32 chips with similar I/O systems. Standards for asymmetric edge devices might emerge, letting sensors join networks designed for laptops and servers.